Welcome !

This is the curriculum vitae of Giovanni Naso



I was born in Colleferro (Rome - Italy) on 16 November 1955 and since 1973 I have been living in Frosinone.

I received my master's degree in Electronic Engineering cum laude from Rome University in 1983.

In 1983 I married Agnese, who presently works as a teacher of English Language and Culture at middle school. We have a son and a daughter : Omar is 21 years old and Marina is 19 years old.

From 1984 to 1987 I worked in Videocolor-Thompson (Italy) as automation engineer for color television picture tube production.

In 1987 I joined Texas Instruments Italy and worked in R&D department as memory chip designer. In 1989 I was assigned to the non volatile memories' department in Houston (U.S.A.) where I worked two years in the development of EEPROM memories.

In 1991 I was a member of an automotive memories' development team. In 1992 I was a member of a Field Memory Development team aimed to design DRAM based memories for advanced television.

In 1994 I was elected Member of the Group of the Technical Staff (MGTS) at Texas Instruments.

In 1995 I was appointed as team leader of DSP and microcontroller embedded static RAM project. It was very exciting job because the whole TI corporation was strongly involved in DSP chipset developments for various modern applications and I had chance to work in tight connection with Nice and Tokyo design centers.

In 1997 Italian R&D department has been selected by Texas Instruments as center of excellence in the design of all TI FLASH memories and I worked in the development of 2 Megabit.

I am author of several patents and technical articles in the field of my activity and they gave me the opportunity to attend international meetings and conferences.

In 1998 I was the coordinator of a design team for 32 Megabit multilevel FLASH memory, a joint project involving Texas Instruments and University of L'Aquila and in this position I had the opportunity to be the coordinator of several degree thesis.

Effective 1st October 1998 Micron Technology Inc. purchased the full memory business of Texas Instruments Inc. to take the challenge to become leader in the world memory business and I was involved as designer for testability in the project of a 32meg/64meg FLASH EEPROM for wireless communication which has been successfully released.

In 2001 I have been elected Micron Technical Fellow as a recognition of technical contribution to the company.

During 2003 I was a team leader of the 128 megabit flash project for wireless application which has been released with the name MT28F128W18 and available on the market. Motorola, for example, used this device in two of its high end cellular phones : A1000 and E1000.

In 2005 I have been project leader of a 4Gb NAND flash with 2bits per cell at 90nm technology node. In 2007 I have been project leader of 8Gb NAND flash with 2 bits per cell at 35nm technology node. Both projects have been successfully completed and included in the Micron memory  portfolio.

Since 2005 I am a member of a team at L'Aquila University teaching "Design of complex microelectronic Systems" at II level master at 'Facolta' di Ingegneria'.

In 2008, Wiley/IEEE published the book 'Nonvolatile Memory Technologies with Emphasis on FLASH'. I was one of the authors of this book taking care of the Cap.3 titled 'Memory Circuit Technologies'.

I am actually project leader of a NAND flash having 128Gb capability at 3 bits per cell at a 20nm technology and advanced features for USB and Solid State Disk applications. It has been presented at ISSCC2013.

You can contact me at the following e-mail addresses:
naso.giovanni@libero.it    .......... private
gnaso@micron.com           .......... work
* Last update: March 2013 *