On internet august 2013
by zantaz®
released on GPL version 2
see copying file
; 26mar96 - 15may96 XD.
; 13jul96 16jul96 XD.
;
; {DEMO - Clock&Set}
; {3rdProvaSIO & varieProveLCD}
; {1st & 2nd Z80RX & start code}
; {1st Z80RX2 & utl.ty routine}
; {1st Z80TX }
; 04{Z80RX3 mk II & CTC fix 13jul96}
;
; "Equates delle tre PIO"
; /CE PIO1 A2
; /CE PIO2 A3
; /CE PIO3 A6
P1AD EQU 0F8H ;11111000
P1AC EQU 0F9H ;11111001
P1BD EQU 0FAH
P1BC EQU 0FBH
P2AD EQU 0F4H ;11110100
P2AC EQU 0F5H ;11110101
P2BD EQU 0F6H
P2BC EQU 0F7H
P3AD EQU 0BCH ;10111100
P3AC EQU 0BDH ;10111101
P3BD EQU 0BEH
P3BC EQU 0BFH
; "Equates della SIO"
; /CE SIO = A5
SIOAD EQU 11011100B ;0DCH
SIOAC EQU 11011101B ;0DDH
SIOBD EQU 11011110B ;0DEH
SIOBC EQU 11011111B ;0DFH
; "Equates del CTC"
; /CE CTC = A4
CTC0 EQU 11101100B
CTC1 EQU 11101101B
CTC2 EQU 11101110B
CTC3 EQU 11101111B
;
DTFLG EQU 4000H
DSP EQU 4100H
;
; "Reset inizia qui"
ORG 0000H
NOP
DI
DI
LD SP,4600H
; "Setup delle Porte PIO"
LD BC,0CFFFH
LD A,B
OUT (P1AC),A
LD A,0F0H
OUT (P1AC),A
LD A,B
OUT (P1BC),A
LD A,C
OUT (P1BC),A
LD A,B
OUT (P2AC),A
LD A,C
OUT (P2AC),A
LD A,B
OUT (P2BC),A
XOR A
OUT (P2BC),A
LD A,B
OUT (P3AC),A
LD A,0FFH
OUT (P3AC),A
LD A,B
OUT (P3BC),A
LD A,0FFH
OUT (P3BC),A
; "Legge i DipSwitch e salta ai sedici prg"
IN A,(P1AD)
AND 0F0H
CP 0H ; 16jul96 XD. not usbl
JR JUMP
JP 0FFFFH
JUMP: DEFW 0; JP Z,0FFFFH ;PRG00
DEFB 0; non utilizzabile !
CP 10H
JP Z,0FFFFH ;PRG01
CP 20H
JP Z,0FFFFH ;PRG02
CP 30H
JP Z,PRG03 ;13jul96
CP 40H
JP Z,PRG04 ;13jul96
CP 50H
JP Z,PRG05 ;29apr96
CP 60H
JP Z,PRG06 ;18apr96
CP 70H
JP Z,PRG07 ;18apr96
CP 80H
JR JUMP2
DEFB 0FFH
JP 0FFFFH
JUMP2: JP Z,PRG08 ;16apr96
CP 90H
JP Z,PRG09 ;16apr96; 5apr96
CP 0A0H
JP Z,PRG0A ;16apr96; 2apr96
CP 0B0H
JP Z,PRG0B ;16apr96;29mar96
CP 0C0H
JP Z,PRG0C ;16apr96;28mar96
CP 0D0H
JP Z,PRG0D ;26mar96; 6apr96
CP 0E0H
JP Z,PRG0E ;Clock by XD.'96
;
; P1AD 0-2 3 dec 3 to 8 Enbl
; P2BD bit 0-7 rel 8 led
;
; Configurazione Display 64 led MA80
;
; P1AD P1AD bit 0-2
; bit 3 ||
; Enable +------+
; P1AD bit 2 00001111
; P1AD bit 1 00110011
; P1AD bit 0 01010101
; ||||||||
; P2BD bit 7-********
; P2BD bit 6-********
; P2BD bit 5-********
; P2BD bit 4-********
; P2BD bit 3-********
; P2BD bit 2-********
; P2BD bit 1-********
; P2BD bit 0-oooooooo
;
; "Inizio prg 1111 (15/F)"
; Piccola demo in assembler
BEGIN: XOR A
OUT (P2BD),A
LD B,A
START: LD A,B
AND 7H
OUT (P1AD),A
LD HL,0FFH
LOOP: DEC HL
LD A,H
OR L
JR NZ,LOOP
DJNZ START
LD A,0FFH
PUSH AF
STA0: LD B,8H
LD HL,TABLE
BEG0: LD A,B
DEC A
OUT (P1AD),A
LD A,(HL)
LD C,A
INC HL
POP AF
INC A
PUSH AF
BIT 7,A
LD A,C
JR Z,LOOP0
XOR 0FFH
LOOP0: OUT (P2BD),A
LD DE,0FFH
LOOP1: DEC DE
LD A,D
OR E
JR NZ,LOOP1
DJNZ BEG0
JR STA0
; Logo MA
TABLE: DEFW 0AF87H
DEFW 0FF87H
DEFW 09F07H
DEFW 0FF07H
; "Tabella def. char. 0-9"
TAB: DEFW 07707H
DEFW 0B707H
DEFW 0F707H
DEFW 05747H
DEFW 05717H
DEFW 00757H
DEFW 0DF1FH
DEFW 01707H
DEFW 04757H
DEFW 05707H
DEFW 03F47H
DEFW 0077FH
DEFW 05707H
DEFW 01707H
DEFW 00757H
; "Subroutine Polling 60hz & Ritardo"
;
; (IX+0) flag
; (IX+1) sessantesimi di sec [0-59]
; (IX+2) secondi [0-59]
; (IX+3) minuti [0-59]
; (IX+4) ore [0-23]
; (Ix+5) giorni [1-7]
;
PL60H: IN A,(P3BD)
BIT 0,A
JR Z,LOOP2
SET 7,(IX+0)
RET
LOOP2: BIT 7,(IX+0)
JR Z,LOOP3
INC (IX+1)
LD A,60
CP (IX+1)
JR NZ,LOOP3
LD (IX+1),0
INC (IX+2)
LD A,60
CP (IX+2)
JR NZ,LOOP3
LD (IX+2),0
INC (IX+3)
LD A,60
CP (IX+3)
JR NZ,LOOP3
LD (IX+3),0
INC (IX+4)
LD A,24
CP (IX+4)
JR NZ,LOOP3
LD (IX+4),0
INC (IX+5)
LD A,8
CP (IX+5)
JR NZ,LOOP3
LD (IX+5),1
LOOP3: RES 7,(IX+0)
RET
; "DIV10 in A out C=A/10 A=A%10"
DIV10: LD C,0
L16: INC C
SUB 10
JR NC,L16
ADD A,10
DEC C
RET
; "STORE memorizza in *DE il char *HL"
STORE: LD C,A
LD HL,TAB
RLCA
ADD A,C
ADD A,L
LD L,A
LD BC,3
LDIR
EX DE,HL
LD (HL),0FFH
INC HL
EX DE,HL
RET
; "DP8C display buffer DSP0-7 & PL60H"
DSP8C: PUSH AF
LD B,8
LD HL,DSP+7
L17: LD A,B
DEC A
OUT (P1AD),A
LD A,(HL)
OUT (P2BD),A
DEC HL
LD A,3FH
L18: EX AF,AF
CALL PL60H
EX AF,AF
DEC A
JR NZ,L18
DJNZ L17
POP AF
DEC A
JR NZ,DSP8C
LD A,0FFH
OUT (P2BD),A
RET
; "STO2A store 2 digits versione A"
STO2A: PUSH AF
CALL DIV10
LD A,C
CALL STORE
CALL PL60H
POP AF
CALL DIV10
CALL STORE
CALL PL60H
EX DE,HL
LD (HL),0AFH
INC HL
LD (HL),0FFH
INC HL
EX DE,HL
CALL PL60H
RET
; "STO2B store 2 digits versione B"
STO2B: PUSH AF
CALL DIV10
LD A,C
AND A
JR Z,L23
CALL STORE
CALL PL60H
JR L25
L23: EX DE,HL
LD B,4
L24: LD (HL),0FFH
INC HL
DJNZ L24
EX DE,HL
CALL PL60H
L25: POP AF
CALL DIV10
CALL STORE
CALL PL60H
EX DE,HL
LD (HL),0AFH
INC HL
LD (HL),0FFH
INC HL
EX DE,HL
CALL PL60H
RET
; "ADD6S add 6 sec to actual time"
ADD6S: LD HL,DTFLG+1
LD DE,DTFLG+7
LD BC,5
LDIR
CALL PL60H
LD A,6
ADD A,(IX+8)
LD (IX+8),A
CP 60
RET C
SUB 60
LD (IX+8),A
INC (IX+9)
LD A,60
CP (IX+9)
RET NZ
LD (IX+9),0
INC (IX+10)
LD A,24
CP (IX+10)
RET NZ
LD (IX+10),0
INC (IX+11)
LD A,8
CP (IX+11)
RET NZ
LD (IX+11),1
RET
; "INDEC inc & dec (IX+12)"
INDEC: CALL PL60H
IN A,(P1BD)
BIT 0,A
JR NZ,L33
INC (IX+12)
LD A,(IX+13)
INC A
CP (IX+12)
JR NZ,L33
LD A,(IX+14)
LD (IX+12),A
L33: CALL PL60H
IN A,(P1BD)
BIT 4,A
JR NZ,L34
DEC (IX+12)
LD A,(IX+14)
DEC A
CP (IX+12)
JR NZ,L34
LD A,(IX+13)
LD (IX+12),A
L34: CALL PL60H
LD DE,DSP
LD A,(IX+12)
CALL STO2B
CALL PL60H
LD A,0FH
CALL DSP8C
IN A,(P1BD)
BIT 2,A
JR NZ,INDEC
RET
; "INIT azzera clock & spegne DSP buffer"
INIT: LD HL,DTFLG
PUSH HL
POP IX
LD B,5
L35: LD (HL),0
INC HL
DJNZ L35
LD (HL),1
DSPOF: LD HL,DSP
LD DE,DSP+1
LD BC,8
LD (HL),0FFH
LDIR
RET
; "Inizio prg 1110 (14/E)"
; Clock quarzato con set mode
PRG0E: CALL INIT
L36: CALL PL60H
CALL ADD6S
CALL PL60H
LD (IX+6),23H
LD DE,DSP+8
LD A,(IX+10)
CALL STO2B
LD A,(IX+9)
CALL STO2A
LD A,(IX+8)
CALL STO2A
L37: LD A,07H
CALL DSP8C
LD HL,DSP+1
LD DE,DSP+0
LD BC,23H
LDIR
CALL PL60H
LD A,(IX+6)
DEC A
LD (IX+6),A
JR NZ,L37
IN A,(P1BD)
BIT 2,A
JR NZ,L36
L38: IN A,(P1BD)
BIT 2,A
JR Z,L38
LD A,(IX+10)
LD (IX+12),A
LD (IX+13),23
LD (IX+14),0
CALL INDEC
LD A,(IX+12)
LD (IX+4),A
L39: IN A,(P1BD)
BIT 2,A
JR Z,L39
LD A,(IX+9)
LD (IX+12),A
LD (IX+13),59
LD (IX+14),0
CALL INDEC
LD A,(IX+12)
LD (IX+3),A
LD (IX+1),0
LD (IX+2),0
CALL DSPOF
JP L36
DEFM "XD."
;
; ORG 0320H
INTTB2: DEFW SIOBT2
DEFW SIOBE2
DEFW SIOBR2
DEFW SIOBS2
DEFW SIOAT2
DEFW SIOAE2
DEFW SIOAR2
DEFW SIOAS2
;
; ORG 0330H
INTTBL: DEFW SIOBT
DEFW SIOBE
DEFW SIOBR
DEFW SIOBS
DEFW SIOAT
DEFW SIOAE
DEFW SIOAR
DEFW SIOAS
;
SIOTB2: DEFB 13 ;n byte set SIOB
DEFB SIOBC
; SIOB abilitata in rx 9600 baud
DEFB 18H ;reset canale
DEFB 10H ;reset ext.st chng
DEFB 30H ;reset errori
;
DEFB 2 ;WR2
DEFB 20H ; lo byte INTTB2 ***
;
DEFB 4 ;WR4
; clk x16 1 stop bit no parity
;
; x64 11 2400 baud
; x32 10 4800 baud
;
DEFB 01000100B ;044H
;
DEFB 5 ;WR5
; DTR on tx 8 bit tx disable RTS on
DEFB 11100010B ;0E2H
;
DEFB 3 ;WR3
; rx 8 bit no auto enable rx enable
DEFB 11100001B ;0E1H
;
DEFB 1 ;WR1
; int on all rx chr (parity do not
; affect vector) status affect vec
; tor int tx disable ext int enabl
DEFB 00011101B ;01DH
;
DEFB 11 ;n byte set SIOA
DEFB SIOAC
; SIOA non abilitata in rx o tx
DEFB 18H ;reset canale
DEFB 10H ;reset ext.st chng
DEFB 30H ;reset errori
;
DEFB 4 ;WR4
; clk x16 1 stop bit no parity
DEFB 01000100B ;044H
;
DEFB 5 ;WR5
; DTR off tx 8 bit tx disbl RTS off
DEFB 01100000B ;060H
;
DEFB 3 ;WR3
; rx 8 bit no auto enable rx disable
DEFB 11000000B ;0C0H
;
DEFB 1 ;WR1
; no rx int no status affect vector
; int tx disable no ext int
DEFB 00000000B ;00H
DEFB 0FFH ; end perip table
;
; SETPR2 setta le periferiche Z80
; al momento solo la SIO
SETPR2: LD HL,SIOTB2
STPR2: LD B,(HL)
INC HL
LD C,(HL)
INC HL
OTIR
BIT 7,(HL)
JR Z,STPR2
LD B,30
RESIN2: CALL MYRETI
DJNZ RESIN2
RET
; la SIOB ha ricevuto un carattere
SIOBR2: DI
EX AF,AF
EXX
IN A,(SIOBD)
XOR 0FFH
LD (HL),A
LD A,(DSP+4)
XOR 1
LD (DSP+4),A
INC HL
LD A,L
AND 07H
CP 4
JR NZ,EXIT1
LD L,0
JR EXIT1
;
SIOBS2: DI
EX AF,AF
LD A,1
OUT (SIOBC),A
IN A,(SIOBC) ;read RR1
XOR 0FFH
LD (DSP+6),A
LD A,(DSP+4)
XOR 2
LD (DSP+4),A
LD A,30H ; reset errors
OUT (SIOBC),A
JR EXIT2
;
SIOBE2: DI
EX AF,AF
LD A,10H ; reset ext sta chg
OUT (SIOBC),A
LD A,(DSP+4)
XOR 4
LD (DSP+4),A
JR EXIT2
;
SIOBT2: DI
EX AF,AF
LD A,28H ; reset tx int pend
OUT (SIOBC),A
LD A,(DSP+4)
XOR 8
LD (DSP+4),A
JR EXIT2
;
SIOAR2: DI
EX AF,AF
LD A,(DSP+4)
XOR 16
LD (DSP+4),A
JR EXIT2
;
SIOAS2: DI
EX AF,AF
LD A,30H ; reset errors
OUT (SIOAC),A
LD A,(DSP+4)
XOR 32
LD (DSP+4),A
JR EXIT2
;
SIOAE2: DI
EX AF,AF
LD A,10H ; reset ext sta chg
OUT (SIOAC),A
LD A,(DSP+4)
XOR 64
LD (DSP+4),A
JR EXIT2
;
SIOAT2: DI
EX AF,AF
LD A,28H ; reset tx int pend
OUT (SIOAC),A
LD A,(DSP+4)
XOR 128
LD (DSP+4),A
JR EXIT2
;
EXIT1: EXX
EXIT2: EX AF,AF
EI
RETI
;
; "DSP8 display buffer DSP0-7"
DSP8: LD B,8
LD HL,DSP+7
L49: LD A,(HL)
OUT (P2BD),A
LD A,B
DEC A
OUT (P1AD),A
DEC HL
LD A,3FH
L50: DEC A
JR NZ,L50
LD A,0FH
OUT (P1AD),A
DJNZ L49
RET
;
; "Inizio prg 1101 (D/13)"
;
; 3rd tentativo con la SIO !!!
;
; questo prg setta la SIO in rice-
; zione e mostra 4 byte ricevuti +
; DSP+4 le varie routine interupt
; i registri RR0 (DSP+5) &
; {SIOB} RR1 (DSP+6) &
; (9600baud) RR2 (DSP+7) sul MA80
PRG0D: JR L51
MYRETI: RETI
L51: CALL SETPR2
EXX
LD HL,DSP
EXX
; setta il registro I per l'inte
; rupt table, mette il processore
; in Interupt Mode 2 ossia ogni
; dispositivo periferico che inter
; rompe la CPU mette il suo vettore
; sul bus che unito al registro I
; punta alla locazione nella quale
; l'indirizzo della routine richie
; sta, abilita le interruzioni
;
LD A,03H ; hi byte INTTB2 ***
LD I,A
IM 2
; DSPOF resetta dsp buffer all 0FFH
CALL DSPOF
; azzera display 64 led MA80
XOR A
OUT (P1AD),A
DEC A
OUT (P2BD),A
;
EI ; lets start all !
L52: IN A,(SIOBC) ;RR0
XOR 0FFH
LD (DSP+5),A
LD A,2
OUT (SIOBC),A
IN A,(SIOBC) ;RR2
XOR 0FFH
LD (DSP+7),A
CALL DSP8
JR L52
;
; end PRG0D last label L52:
;
;
; DL586M delay 586 msec @2456700Hz
DL586M: LD HL,0
L55: DEC HL
LD A,H
OR L
JR NZ,L55
RET
;
; WTRC write command to LCD
WRTC: OUT (P2BD),A
LD A,0100B ; E 1 RS 0 RW 0
OUT (P1AD),A
LD A,0 ;10H
LC0: DEC A
JR NZ,LC0
; now reg A equal 0 E 0 RS 0 RW 0
OUT (P1AD),A
RET
;
; WTRD write data to LCD
WRTD: OUT (P2BD),A
LD A,0110B ; E 1 RS 1 RW 0
OUT (P1AD),A
LD A,0 ;10H
LC1: DEC A
JR NZ,LC1
LD A,0010B ; E 0 RS 1 RW 0
OUT (P1AD),A
RET
;
; RDC read command from LCD
; set P2B input
RDC: LD A,0CFH
OUT (P2BC),A
LD A,0FFH
OUT (P2BC),A
LD A,0101B ; E 1 RS 0 RW 1
OUT (P1AD),A
LD A,10H
LC2: DEC A
JR NZ,LC2
IN A,(P2BD)
PUSH AF
LD A,0001B ; E 0 RS 0 RW 1
OUT (P1AD),A
; set P2B output
LD A,0CFH
OUT (P2BC),A
XOR A
OUT (P2BC),A
POP AF
RET
;
; RDD read data from LCD
; set P2B input
RDD: LD A,0CFH
OUT (P2BC),A
LD A,0FFH
OUT (P2BC),A
LD A,0111B ; E 1 RS 1 RW 1
OUT (P1AD),A
LD A,10H
LC3: DEC A
JR NZ,LC3
IN A,(P2BD)
PUSH AF
LD A,0011B ; E 0 RS 1 RW 1
OUT (P1AD),A
; set P2B output
LD A,0CFH
OUT (P2BC),A
XOR A
OUT (P2BC),A
POP AF
RET
;
SETUP EQU 0x38
DSPON EQU 0x0C
DSPOFF EQU 0x08
BLINK EQU 0x0F
CURSOR EQU 0x0E
HOME EQU 0x02
DSPCLR EQU 0x01
; 111111
; 0123456789012345
LCDM: DEFM "Antonio Mariani "
DEFB 0
LCDM2: DEFM " XD. (C) 1996 "
DEFB 0
;
; "Inizio prg 1100 (C/12)"
;
; 1st trial LCD 16apr96 XD.
;
PRG0C: LD A,SETUP
CALL WRTC
LD A,DSPON
CALL WRTC
L56: LD A,HOME
CALL WRTC
LD HL,LCDM
LCD0: LD A,(HL)
JR Z,LCD1
CALL WRTD
INC HL
JR LCD0
LCD1: LD A,80H+40
CALL WRTC
LD HL,LCDM2
LCD2: LD A,(HL)
JR Z,LCD3
CALL WRTD
INC HL
JR LCD2
LCD3: LD B,10
L53: CALL DL586M
DJNZ L53
LD A,DSPCLR
CALL WRTC
LD B,5
L54: CALL DL586M
DJNZ L54
JR L56
;
; end PRG0C last label L56:
;
;
; "Inizio prg 1011 (B/11)"
;
; 2nd trial LCD 16apr96 XD.
;
PRG0B: LD A,SETUP
CALL WRTC
LD A,DSPON
CALL WRTC
L57: LD A,HOME
CALL WRTC
LD HL,LCDM
LD B,16
L58: LD A,(HL)
CALL WRTD
INC HL
DJNZ L58
LD A,80H+40
CALL WRTC
LD HL,LCDM2
LD B,16
L59: LD A,(HL)
CALL WRTD
INC HL
DJNZ L59
LD B,10
L60: CALL DL586M
DJNZ L60
LD A,DSPCLR
CALL WRTC
LD B,5
L61: CALL DL586M
DJNZ L61
JR L57
;
; end PRG0B last label L61:
;
;
; WTRC2 write command to LCD
WRTC2: OUT (P2BD),A
LD A,0100B ; E 1 RS 0 RW 0
OUT (P1AD),A
LD A,10H
L62: DEC A
JR NZ,L62
; now reg A equal 0 E 0 RS 0 RW 0
OUT (P1AD),A
RET
;
; WTRD2 write data to LCD
WRTD2: OUT (P2BD),A
LD A,0110B ; E 1 RS 1 RW 0
OUT (P1AD),A
LD A,10H
L63: DEC A
JR NZ,L63
LD A,0010B ; E 0 RS 1 RW 0
OUT (P1AD),A
RET
;
; "Inizio prg 1010 (A/10)"
;
; 3rd trial LCD 16apr96 XD.
;
PRG0A: LD A,SETUP
CALL WRTC2
LD A,DSPON
CALL WRTC2
L64: LD A,HOME
CALL WRTC2
LD HL,LCDM
L65: LD A,(HL)
OR A
JR Z,L66
CALL WRTD2
INC HL
JR L65
L66: LD A,80H+40
CALL WRTC
LD HL,LCDM2
L67: LD A,(HL)
OR A
JR Z,L68
CALL WRTD2
INC HL
JR L67
L68: LD B,7
L69: CALL DL586M
DJNZ L69
LD A,DSPCLR
CALL WRTC2
LD B,3
L70: CALL DL586M
DJNZ L70
JR L64
;
; end PRG0A last label L70:
;
;
; WTRC3 write command to LCD
WRTC3: OUT (P2BD),A
LD A,0100B ; E 1 RS 0 RW 0
OUT (P1AD),A
LD A,30H
L71: DEC A
JR NZ,L71
; now reg A equal 0 E 0 RS 0 RW 0
OUT (P1AD),A
RET
;
; WTRD3 write data to LCD
WRTD3: OUT (P2BD),A
LD A,0110B ; E 1 RS 1 RW 0
OUT (P1AD),A
LD A,30H
L72: DEC A
JR NZ,L72
LD A,0010B ; E 0 RS 1 RW 0
OUT (P1AD),A
RET
;
; "Inizio prg 1001 (9/9)"
;
; 4th trial LCD 16apr96 XD.
;
PRG09: LD A,SETUP
CALL WRTC3
LD A,DSPON
CALL WRTC3
L73: LD A,HOME
CALL WRTC3
LD HL,LCDM
LD B,16
L74: LD A,(HL)
CALL WRTD3
INC HL
DJNZ L74
LD A,80H+40
CALL WRTC3
LD HL,LCDM2
LD B,16
L75: LD A,(HL)
CALL WRTD3
INC HL
DJNZ L75
LD B,6
L76: CALL DL586M
DJNZ L76
LD A,DSPCLR
CALL WRTC3
LD B,3
L77: CALL DL586M
DJNZ L77
JR L73
;
; end PRG09 last label L77:
;
;
; WTRC4 write command to LCD
WRTC4: OUT (P2BD),A
LD A,0100B ; E 1 RS 0 RW 0
OUT (P1AD),A
LD A,70H
L78: DEC A
JR NZ,L78
; now reg A equal 0 E 0 RS 0 RW 0
OUT (P1AD),A
RET
;
; WTRD4 write data to LCD
WRTD4: OUT (P2BD),A
LD A,0110B ; E 1 RS 1 RW 0
OUT (P1AD),A
LD A,70H
L79: DEC A
JR NZ,L79
LD A,0010B ; E 0 RS 1 RW 0
OUT (P1AD),A
RET
;
; "Inizio prg 1000 (8/8)"
;
; 5th trial LCD 16apr96 XD.
;
PRG08: LD A,SETUP
CALL WRTC4
LD A,DSPON
CALL WRTC4
L80: LD A,HOME
CALL WRTC4
LD HL,LCDM
LD B,16
L81: LD A,(HL)
CALL WRTD4
INC HL
DJNZ L81
LD A,80H+40
CALL WRTC4
LD HL,LCDM2
LD B,16
L82: LD A,(HL)
CALL WRTD4
INC HL
DJNZ L82
CALL DL586M
CALL DL586M
CALL DL586M
LD A,DSPCLR
CALL WRTC4
CALL DL586M
JR L80
;
; end PRG08 last label L82:
;
; 8apr96 - 18apr96 XD.
; SIORX2
;
; DTFLG bit0 rx on
; bit1 byte start rx rcvd
; bit2 len chr rx load' in B
; bit3 end store rx chrs
; bit4 unused
; bit5 err bad start byte rcvd
; bit6 err xor rcvd chr
; bit7 all done
;
; DTFLG+1 B reg
; DTFLG+2 E reg
; DTFLG+3 HL reg
;
; AF' scratch
; B' count chr down
; C' left unchanged
; D' store actual chr
; E' store xor chrs
; HL' point to mem
;
SIOBR: DI
EX AF,AF
EXX
IN A,(SIOBD)
LD D,A ; chr rcvd in D reg
LD A,(DTFLG)
BIT 0,A ; rx on ?
JR Z,EXIT
BIT 1,A ; byte start rx ?
JR NZ,RS0
LD A,065H ; magic byte
CP D
JR Z,RS1
LD A,10100000B ; err bad s rx
JR EXIT0
RS1: LD A,(DTFLG)
SET 1,A ; byte start rx rcvd
JR EXIT0
RS0: BIT 2,A ; len B reg loaded ?
JR NZ,RS2
LD B,D ; len rx in B reg
;
LD A,B
LD (DTFLG+1),A
;
LD A,(DTFLG)
SET 2,A ; len rcvd
JR EXIT0
RS2: BIT 3,A ; end store chrs ?
JR NZ,RS3
LD (HL),D ; store chr in (HL)
INC HL
LD A,E
XOR D
LD E,A ; in E reg xor chrs
;
LD (DTFLG+2),A
LD A,B
DEC A
LD (DTFLG+1),A
LD (DTFLG+3),HL
;
DJNZ EXIT
LD A,(DTFLG)
SET 3,A ; all chrs rcvd
JR EXIT0
RS3: LD A,E
CP D
JR NZ,RS4
LD A,10000000B ; end rx all ok
JR EXIT0
RS4: LD A,11000000B ; err xor chrs
JR EXIT0
;
EXIT0: LD (DTFLG),A
EXIT: EXX
EX AF,AF
SIOBT:
SIOBE:
SIOBS:
SIOAT:
SIOAE:
SIOAR:
SIOAS: EI
RETI
;
; RX 18apr96 - 19apr96 XD.
;
;
; BLCDB blank lcd buffer
;
BLCDB: LD BC,20H
LD DE,LCDB+1
LD HL,LCDB
LD (HL),C
LDIR
RET
;
; WRLCD write lcd buffer to lcd
;
WRLCD: LD A,HOME
CALL WRTC5
LD A,70H
L85: DEC A
JR NZ,L85
LD HL,LCDB
LD B,16
L83: LD A,(HL)
CALL WRTD5
INC HL
DJNZ L83
LD A,80H+40
CALL WRTC5
; LD HL,LCDB+10H
LD B,16
L84: LD A,(HL)
CALL WRTD5
INC HL
DJNZ L84
RET
;
; WTRC5 write command to LCD
;
WRTC5: OUT (P2BD),A
LD A,0100B ; E 1 RS 0 RW 0
OUT (P1AD),A
LD A,0FH
L86: DEC A
JR NZ,L86
; now reg A equal 0 E 0 RS 0 RW 0
OUT (P1AD),A
RET
;
; WTRD5 write data to LCD
;
WRTD5: OUT (P2BD),A
LD A,0110B ; E 1 RS 1 RW 0
OUT (P1AD),A
LD A,0FH
L87: DEC A
JR NZ,L87
LD A,0010B ; E 0 RS 1 RW 0
OUT (P1AD),A
RET
;
; INILCD initialize lcd & pr msg
;
INILCD: LD A,SETUP
CALL WRTC5
LD A,DSPON
CALL WRTC5
LD A,HOME
CALL WRTC5
LD A,70H
L88: DEC A
JR NZ,L88
LD HL,LCDM
LD B,16
L89: LD A,(HL)
CALL WRTD5
INC HL
DJNZ L89
LD A,80H+40
CALL WRTC5
LD HL,LCDM2
LD B,16
L90: LD A,(HL)
CALL WRTD5
INC HL
DJNZ L90
LD B,03H ; was 07H
L91: CALL DL586M
DJNZ L91
RET
;
; PRXCH print on lcd buff exad chr
; IN: reg A exad char
; reg HL point lcd buffer pos
; OUT: reg HL = HL + 2
; USD: reg C
;
PRXCH: LD C,A
AND 0F0H
RLCA
RLCA
RLCA
RLCA
CP 10
JR NC,L92
ADD A,"0"
JR L93
L92: ADD A,"a"-10
L93: LD (HL),A
INC HL
LD A,C
AND 0FH
CP 10
JR NC,L94
ADD A,"0"
JR L95
L94: ADD A,"a"-10
L95: LD (HL),A
INC HL
RET
;
; LCDMT
; IN: reg HL point to lcd msg
; USD: reg BC & DE
;
LCDMT: LD DE,LCDB+10H
LD BC,10H
LDIR
RET
; 111111
; 0123456789012345
LCDM3: DEFM "XD. '96 XD. '96"
LCDM4: DEFM "All done ! t 1st"
LCDM5: DEFM "ERR bad str byte"
LCDM6: DEFM "ERR xor chr mism"
LCDM7: DEFM "& now,lets start"
DEFM "the Z80 code ..."
;
; "Bxx Exx Hxxxx xx"
;
; "Axx Bxxxx Dxxxx"
; "SZ A PNC Hxxxx"
;
LCDB EQU DTFLG+80H
;
;
; "Inizio prg 0111 (7/7)"
;
; 1st trial Z80RX @ 18apr96 XD.
;
PRG07: CALL SETPR2 ; set SIO chip
;
LD A,2
OUT (SIOBC),A
LD A,30H ; lo byte INTTBL ***
OUT (SIOBC),A
;
LD A,03H ; hi byte INTTBL ***
LD I,A
IM 2
;
TRICKY: EXX ; set alternate
LD HL,4200H ; register for
LD DE,00FFH ; SIOBR interupt
LD BC,0000H ; routine
EXX
;
CALL INILCD
;
CALL BLCDB
;
LD IX,DTFLG
LD (IX+0),1 ; start rx
;
EI
;
LD HL,LCDM3
CALL LCDMT
;
L96: LD HL,LCDB
LD (HL),"B" ; 0
INC HL ; 1
LD A,(IX+1)
CALL PRXCH ; 23
; LD (HL)," "
INC HL ; 4
LD (HL),"E"
INC HL ; 5
LD A,(IX+2)
CALL PRXCH ; 67
; LD (HL)," "
INC HL ; 8
LD (HL),"H"
; INC HL
; LD (HL),"L"
INC HL ; 9
LD A,(IX+4)
CALL PRXCH ; AB
LD A,(IX+3)
CALL PRXCH ; CD
; LD (HL)," "
INC HL ; E
LD A,(IX+0)
CALL PRXCH ; F*
; LD (HL),"@"
;
CALL WRLCD
;
BIT 7,(IX+0) ; end rx ?
JR Z,L96
;
BIT 6,(IX+0) ; xor mism ?
JR Z,L97
LD HL,LCDM6
CALL LCDMT
JR L99
;
L97: BIT 5,(IX+0) ; bad str ?
JR Z,L98
LD HL,LCDM5
CALL LCDMT
JR L99
;
L98: LD HL,LCDM4 ; ok, all done
CALL LCDMT
L99: CALL WRLCD
;
LD B,0FH ; wait a little
M0: CALL DL586M
DJNZ M0
;
LD HL,LCDM7 ; str code msg
LD DE,LCDB
LD BC,20H
LDIR
CALL WRLCD
;
; LD B,5 ; count down
DEFW 0
LD HL,LCDB+1FH
; M1: CALL DL586M ; USA HL !!!!!!
DEFW 0
DEFB 0
; LD A,B
DEFB 0
; ADD A,"0"
DEFW 0
; LD (HL),A
DEFB 0
; CALL WRLCD
DEFW 0
DEFB 0
; DJNZ M1
DEFW 0
;
; CALL DL586M ; USA HL !!!!!!
DEFW 0
DEFB 0
LD (HL),"0"
CALL WRLCD
CALL DL586M
;
LD BC,0
LD DE,0
LD HL,0
PUSH HL
POP AF
JP 4200H ; START Z80 code
;
; end PRG07 last label L99: M1:
;
; 111
; 0123456789012
DEFM "XD. '96 XD. @"
; ORG 08D0H
INTTB3: DEFW SIOBT3
DEFW SIOBE3
DEFW SIOBR3
DEFW SIOBS3
DEFW SIOAT3
DEFW SIOAE3
DEFW SIOAR3
DEFW SIOAS3
;
SIOBS3: DI
EX AF,AF
LD A,30H ; reset errors
OUT (SIOBC),A
JR EXITA
;
SIOBE3: DI
EX AF,AF
LD A,10H ; reset ext sta chg
OUT (SIOBC),A
JR EXITA
;
SIOBT3: DI
EX AF,AF
LD A,28H ; reset tx int pend
OUT (SIOBC),A
JR EXITA
;
; 8apr96 - 18apr96 XD.
; SIORX2 bis
;
; DTFLG bit0 rx on
; bit1 byte start rx rcvd
; bit2 len chr rx load' in B
; bit3 end store rx chrs
; bit4 unused
; bit5 err bad start byte rcvd
; bit6 err xor rcvd chr
; bit7 all done
;
; DTFLG+1 B reg
; DTFLG+2 E reg
; DTFLG+3 HL reg
;
; AF' scratch
; B' count chr down
; C' left unchanged
; D' store actual chr
; E' store xor chrs
; HL' point to mem
;
SIOBR3: DI
EX AF,AF
EXX
IN A,(SIOBD)
LD D,A ; chr rcvd in D reg
LD A,(DTFLG)
BIT 0,A ; rx on ?
JR Z,EXITN
BIT 1,A ; byte start rx ?
JR NZ,RS5
LD A,065H ; magic byte
CP D
JR Z,RS6
LD A,10100000B ; err bad s rx
JR EXITZ
RS6: LD A,(DTFLG)
SET 1,A ; byte start rx rcvd
JR EXITZ
RS5: BIT 2,A ; len B reg loaded ?
JR NZ,RS7
LD B,D ; len rx in B reg
;
LD A,B
LD (DTFLG+1),A
;
LD A,(DTFLG)
SET 2,A ; len rcvd
JR EXITZ
RS7: BIT 3,A ; end store chrs ?
JR NZ,RS8
LD (HL),D ; store chr in (HL)
INC HL
LD A,E
XOR D
LD E,A ; in E reg xor chrs
;
LD (DTFLG+2),A
LD A,B
DEC A
LD (DTFLG+1),A
LD (DTFLG+3),HL
;
DJNZ EXITN
LD A,(DTFLG)
SET 3,A ; all chrs rcvd
JR EXITZ
RS8: LD A,E
CP D
JR NZ,RS9
LD A,10000000B ; end rx all ok
JR EXITZ
RS9: LD A,11000000B ; err xor chrs
JR EXITZ
;
EXITZ: LD (DTFLG),A
EXITN: EXX
EXITA: EX AF,AF
SIOAT3:
SIOAE3:
SIOAR3:
SIOAS3: EI
RETI
;
; "Inizio prg 0110 (6/6)"
;
; 2nd trial Z80RX @ 18apr96 XD.
;
PRG06: CALL SETPR2 ; set SIO chip
;
LD A,2
OUT (SIOBC),A
LD A,D0H ; lo byte INTTB3 ***
OUT (SIOBC),A
;
LD A,08H ; hi byte INTTB3 ***
LD I,A
IM 2
;
XOR A
LD (DTFLG),A
LD (DTFLG+1),A
LD (DTFLG+3),A
DEC A
LD (DTFLG+2),A
LD A,42H
LD (DTFLG+4),A
;
JP TRICKY
;
; end PRG06 last label L99: M1:
;
; RX2 25apr96 - 29apr96 XD.
;
;
; WTRC6 write command to LCD
;
WRTC6: OUT (P2BD),A
LD A,0100B ; E 1 RS 0 RW 0
OUT (P1AD),A
XOR A ; E 0 RS 0 RW 0
OUT (P1AD),A
RET
;
; WTRD6 write data to LCD
;
WRTD6: OUT (P2BD),A
LD A,0110B ; E 1 RS 1 RW 0
OUT (P1AD),A
LD A,0010B ; E 0 RS 1 RW 0
OUT (P1AD),A
RET
;
; PRXCH2 print on lcd buff exad chr
; IN: reg A exad char
; reg HL point lcd buffer pos
; OUT: reg HL = HL + 2
;
PRXCH2: PUSH AF
AND 0F0H
RLCA
RLCA
RLCA
RLCA
CP 10
JR NC,M02
ADD A,"0"
JR M03
M02: ADD A,"a"-10
M03: LD (HL),A
INC HL
POP AF
AND 0FH
CP 10
JR NC,M04
ADD A,"0"
JR M05
M04: ADD A,"a"-10
M05: LD (HL),A
INC HL
RET
;
; BLCDB2 blank lcd buffer
;
BLCDB2: PUSH BC
PUSH DE
PUSH HL
LD BC,20H
LD DE,LCDB+1
LD HL,LCDB
LD (HL),C
LDIR
POP HL
POP DE
POP BC
RET
;
; WRLCD2 write lcd buffer to lcd
;
WRLCD2: PUSH BC
PUSH HL
LD A,80H ; lcd -> chr 0
CALL WRTC6
LD HL,LCDB
LD B,16
M6: LD A,(HL)
CALL WRTD6
INC HL
DJNZ M6
LD A,80H+40 ; lcd -> chr 16
CALL WRTC6
; LD HL,LCDB+10H
LD B,16
M7: LD A,(HL)
CALL WRTD6
INC HL
DJNZ M7
POP HL
POP BC
RET
;
; DL587M delay 587 msec @2456700Hz
;
DL587M: PUSH HL
LD HL,0
M8: DEC HL
LD A,H
OR L
JR NZ,M8
POP HL
RET
;
; LCDMT2 lcd message transfer
; IN: reg HL point to message
; byte moved 10H from LCDB+10H
;
LCDMT2: PUSH BC
PUSH DE
; PUSH HL
LD DE,LCDB+10H
LD BC,10H
LDIR
; POP HL
POP DE
POP BC
RET
;
; LCDMT2 lcd message transfer
; IN: reg HL point to message
; byte moved 20H from LCDB
;
LCDMT3: PUSH BC
PUSH DE
; PUSH HL
LD DE,LCDB
LD BC,20H
LDIR
; POP HL
POP DE
POP BC
RET
;
;
; 111111
; 0123456789012345
; "Axx Bxxxx Dxxxx"
; "SZ A PNC Hxxxx"
;
REG EQU 4040H
;
; reg AF -> (REG+0)
; reg BC -> (REG+2)
; reg DE -> (REG+4)
; reg HL -> (REG+6)
;
; DREG display reg
;
DREG: PUSH AF ; save register
LD (REG+2),BC
LD (REG+4),DE
LD (REG+6),HL
POP HL
LD (REG),HL
;
CALL BLCDB2
;
LD HL,LCDB
;
LD (HL),"A"
INC HL
LD A,(REG+1)
CALL PRXCH2
;
INC HL
INC HL
;
LD (HL),"B"
INC HL
LD A,(REG+3)
CALL PRXCH2
LD A,(REG+2)
CALL PRXCH2
;
INC HL
;
LD (HL),"D"
INC HL
LD A,(REG+5)
CALL PRXCH2
LD A,(REG+4)
CALL PRXCH2
;
LD A,(REG+0)
;
BIT 7,A
JR Z,RL0
LD (HL),"S"
RL0: INC HL
;
BIT 6,A
JR Z,RL1
LD (HL),"Z"
RL1: INC HL
;
INC HL
;
BIT 4,A
JR Z,RL2
LD (HL),"A"
RL2: INC HL
;
INC HL
;
BIT 2,A
JR Z,RL3
LD (HL),"P"
RL3: INC HL
;
BIT 1,A
JR Z,RL4
LD (HL),"N"
RL4: INC HL
;
BIT 0,A
JR Z,RL5
LD (HL),"C"
RL5: INC HL
;
INC HL
INC HL
INC HL
;
LD (HL),"H"
INC HL
LD A,(REG+7)
CALL PRXCH2
LD A,(REG+6)
CALL PRXCH2
;
CALL WRLCD2
;
LD HL,(REG+0) ; restore reg
PUSH HL
LD BC,(REG+2)
LD BC,(REG+4)
LD BC,(REG+6)
POP AF
;
RET
DEFM "XD"
; 8apr96 - 29apr96 XD.
; SIORX4
; questo code e' predisposto
; per succ. code e provare anche
; la trasmissione RS232
;
; ORG 0AB0H
INTTB4: DEFW SIOBT4
DEFW SIOBE4
DEFW SIOBR4
DEFW SIOBS4
DEFW SIOAT4
DEFW SIOAE4
DEFW SIOAR4
DEFW SIOAS4
;
SIOBT4: DI
EX AF,AF
LD A,28H ; reset tx int pend
OUT (SIOBC),A
LD A,(DTFLG+8)
BIT 0,A ; tx on ?
JP NZ,JMPTX ; tx patch
JR EXITF
;
SIOBE4: DI
EX AF,AF
LD A,10H ; reset ext sta chg
OUT (SIOBC),A
JR EXITF
;
SIOBS4: DI
EX AF,AF
LD A,30H ; reset errors
OUT (SIOBC),A
JR EXITF
;
; DTFLG bit0 rx on
; bit1 byte start rx rcvd
; bit2 len lo chr rx ld' in C
; bit3 len hi chr rx ld' in B
; bit4 end store rx chrs
; bit5 err bad start byte rcvd
; bit6 err xor rcvd chr
; bit7 all done
;
; DTFLG+0 rx flags
;
; DTFLG+1 C reg
; DTFLG+2 B reg
; DTFLG+3 HL reg (not impl)
;
; DTFLG+8 tx flags
;
; AF' scratch
; BC' len Z80 code
; D' store actual chr
; E' store xor chrs
; HL' point to mem
;
SIOBR4: DI
EX AF,AF
EXX
IN A,(SIOBD)
LD D,A ; chr rcvd in D reg
LD A,(DTFLG)
BIT 0,A ; rx on ?
JR Z,EXITS
BIT 1,A ; byte start rx ?
JR NZ,SC0
;
BIT 7,D ; is special byte
JP NZ,JMPRX ; recevied ?
;
LD A,065H ; magic byte
CP D
JR Z,SC1
LD A,10100000B ; err bad s rx
JR EXITS0
SC1: LD A,(DTFLG)
SET 1,A ; byte start rx rcvd
JR EXITS0
SC0: BIT 2,A ; len lo C reg ld' ?
JR NZ,SC2
LD C,D ; len lo rx in C reg
;
LD A,C
LD (DTFLG+1),A
;
LD A,(DTFLG)
SET 2,A ; len lo rcvd
JR EXITS0
SC2: BIT 3,A ; len hi B reg ld' ?
JR NZ,SC3
LD B,D ; len hi rx in B reg
;
LD A,B
LD (DTFLG+2),A
;
LD A,(DTFLG)
SET 3,A ; len hi rcvd
JR EXITS0
SC3: BIT 4,A ; end store chrs ?
JR NZ,SC4
LD (HL),D ; store chr in (HL)
INC HL
LD A,E
XOR D
LD E,A ; in E reg xor chrs
;
; LD (DTFLG+2),A
; LD A,B
; DEC A
; LD (DTFLG+1),A
; LD (DTFLG+3),HL
;
DEC BC
;
LD (DTFLG+1),BC
;
LD A,B
OR C
JR NZ,EXITS
LD A,(DTFLG)
SET 4,A ; all chrs rcvd
JR EXITS0
SC4: LD A,E
CP D
JR NZ,SC5
LD A,10000000B ; end rx all ok
JR EXITS0
SC5: LD A,11000000B ; err xor chrs
JR EXITS0
;
EXITS0: LD (DTFLG),A
EXITS: EXX
EXITF: EX AF,AF
SIOAT4:
SIOAE4:
SIOAR4:
SIOAS4: EI
RETI
;
;
; 111111
; 0123456789012345
LCDM8: DEFM "remain BCxxxx xx"
DEFM "XD. '96 >SIORX3<"
;
; "Inizio prg 0101 (5/5)"
;
; 1st trial Z80RX2 @
; 18apr96 - 27apr96 XD.
;
PRG05: CALL SETPR2 ; set SIO chip
;
LD A,2 ; patch to SIO setup
OUT (SIOBC),A
LD A,B0H ; lo byte INTTB4 ***
OUT (SIOBC),A
;
LD A,0AH ; hi byte INTTB4 ***
LD I,A
IM 2
;
TRCKY2: XOR A
LD (DTFLG),A ; res rx flag
LD (DTFLG+1),A
LD (DTFLG+2),A
LD (DTFLG+8),A ; res tx flag
;
EXX ; set alternate
LD HL,4100H ; register for
LD DE,00FFH ; SIOBR interupt
LD BC,0000H ; routine
EXX ; NEW ORG CODE
;
CALL INILCD ; ?
;
CALL BLCDB2
;
LD IX,DTFLG
LD (IX+0),1 ; start rx
;
EI
;
LD HL,LCDM3
CALL LCDMT2
;
CALL WRLCD2
;
CALL DL587M
;
LD HL,LCDM8
CALL LCDMT3
;
M12: LD HL,LCDB+9
; LD (HL),"B"
; INC HL
; LD (HL),"C"
; INC HL
LD A,(IX+2)
CALL PRXCH2
LD A,(IX+1)
CALL PRXCH2
; LD (HL)," "
INC HL
LD A,(IX+0)
CALL PRXCH2
; LD (HL),"@"
;
CALL WRLCD2
;
BIT 7,(IX+0) ; end rx ?
JR Z,M12
;
BIT 6,(IX+0) ; xor mism ?
JR Z,M09
LD HL,LCDM6
CALL LCDMT2
JR M11
;
M09: BIT 5,(IX+0) ; bad str ?
JR Z,M10
LD HL,LCDM5
CALL LCDMT2
JR M11
;
M10: LD HL,LCDM4 ; ok, all done
CALL LCDMT2
;
M11: CALL WRLCD2
;
CALL DL587M
;
LD HL,LCDM7 ; & now ...
CALL LCDMT3
;
CALL WRLCD2
;
CALL DL587M
;
LD BC,0
LD DE,0
LD HL,0
PUSH HL
POP AF
JP 4100H ; START Z80 code
;
; end PRG05 last label L99: M12:
;
; JUMP 30apr- XD.
;
JMP0 EQU 40C0H
JMP1 EQU 40C2H
;
JMPRX: PUSH HL
LD HL,(JMP0)
JP (HL)
;
JMPTX: PUSH HL
LD HL,(JMP1)
JP (HL)
;
; vector in ram 47E0H
; 1jun96 - 24jun96 XD.
;
; Top of 2K RAM 6116
; 47FF ---------------------------
; | Spare (RAM libera momen.)
; 47F8 ---------------------------
; 47F7 ---------------------------
; | Vector Table CTC
; 47F0 ---------------------------
; 47EF ---------------------------
; | Vector Table SIO
; 47E0 ---------------------------
; 47DF ---------------------------
; | Spare (RAM libera momen.)
; 47C1 ---------------------------
; 47C0 ---------------------------
; | SP stack pointer
; | cresce verso il basso
;
; "Inizio prg 0100 (4/4)"
;
PRG04: DEFW 0; LD SP,47C0H
DEFB 0; tolta !
;
CALL SETPR2 ; set SIO chip
;
NEWVEC EQU 47E0H
;
LD HL,INTTB4
LD DE,NEWVEC
LD BC,10H
LDIR
;
LD HL,INTTB4+8
LD DE,NEWVEC+10H
LD BC,8
LDIR
;
LD A,2
OUT (SIOBC),A
LD A,0E0H ; lo byte VECT ***
OUT (SIOBC),A
;
LD A,0F0H
OUT (CTC0),A ; lo byte ***
; VECT table + 10H offset
;
; reset channel 0 1 2
;
LD A,43H
OUT (CTC0),A
OUT (CTC1),A
OUT (CTC2),A
; reset channel 3
;
LD A,01001011B
OUT (CTC3),A
;
LD A,47H
LD I,A
IM 2
;
JP TRCKY2
;
; end PRG04 last label L99: M12:
;
; "Inizio prg 0011 (3/3)"
;
PRG03: DEFW 0; JR M13
; tolta 16jul96 XD.
LD SP,47C0H
;
; reset channel 0 1 2
;
M13: LD A,43H
OUT (CTC0),A
OUT (CTC1),A
OUT (CTC2),A
; reset channel 3
;
LD A,01001011B
OUT (CTC3),A
;
LD A,0B8H
OUT (CTC0),A ; lo byte ***
;
JP PRG05
;
; end PRG03 last label L99: M13:
;
END
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THINK MAN/WOMAN THINK BEFORE DO IT ...
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