Programma PAL0

MODULE ccd_PAL0

TITLE 'Temporizzazioni per la ccd e generatore di shutter '
 
"Inputs
clk                               pin 11;
[AD9..AD0]               pin 39,3,32,44,30,2,9,42,18,26 ;  //ingressi comparatore
[CK1..CK0]                pin 38,21  istype 'reg,buffer';  //divisore di freq.
[P11..P0]                    pin 16,41,37,20,22,28,5,15,17,4,40,27  istype 'reg,buffer';
                                           //contatore di pixels, generatore di rog.

[UD11..UD0]              node   istype 'reg,buffer';  //contatore UP/DOWN
ROG                            pin 19; //impulso di rog proveniente dalla PAL2
OUT                            node;                         //selettore UP/DOWN
FF                                node;     istype 'reg';        //FF sel. UP/DOWN
FFSHU                        pin 25  istype 'reg,buffer';  //shutter
SHU                            node;
SHU0                          node;
SHU1                          node;
SHU2                         node;
SHU3                         node;
 
Equations

[CK1..CK0].clk = clk;
[P11..P0].clk  = CK1;
[CK1..CK0] := [CK1..CK0] + 1;

when ([P11..P0] >= 2169) then [P11..P0] := 0 else [P11..P0] := [P11..P0] + 1;

when ([AD9..AD0] >= 1001) then OUT = 1 else OUT = 0;

FF := OUT;  // flip-flop che memorizza il superamento della soglia. La prima volta che si
                     // supera la soglia l’uscita del FF viene forzata a 1 e rimane in questo stato
                     // anche se il segnale scende sotto la soglia.
FF.clk = ROG;
FF.AP  = OUT;

[UD11..UD0].clk = !ROG;

when (FF.FB == 1) then {
        when ([UD11..UD0] < 2087 ) then [UD11..UD0] := [UD11..UD0] + 1
                                   else [UD11..UD0] := 2087;}

else {
              when ([UD11..UD0] > 0 )    then [UD11..UD0] := [UD11..UD0] - 1
                                   else [UD11..UD0] := 0;}
 
SHU0 = [P11..P7] > [UD11..UD7];
SHU1 = [P11..P7] == [UD11..UD7];
SHU2 = [P6..P0] > [UD6..UD0];
SHU3 = SHU1 & SHU2;
SHU  = SHU0 # SHU3 # (FF.FB==0)&([UD11..UD0]==0);

FFSHU := SHU;
FFSHU.clk = !CK1;

End
 

Programma PAL1
 

MODULE ccddsp_PAL1

TITLE 'Segnali per la CCD,MAC e DSP '
 

[CK1..CK0]               pin 27,32;
[P11..P0]                   pin 7,22,4,3,6,17,41,43,8,10,38,9;
ROG                          pin 37; // impulso di rog
CTNCCD                   node; // controllo sul clock della ccd
CTNMAC                   node; // controllo sul clock in dei MACs
CCDCLOCK, ADCLOCK        pin 42,40  istype 'buffer'; //clock ccd, AD
CLKXY                    pin 16; // clock ingressi MACs
CLKOUT                   pin 21; // clock input product register o uscita dati MAC
PREL                        pin 15; // enable tri-state buffer MAC per il reset del product register
INT                           pin 19; // segnale per la generazione dell' interrupt n0 1 per il DSP.
                                           (400000h)
AD0                          pin 20; //LSB bus indirizzi
XF0                           pin 28; // Abilitazione porte logiche
STROBE                   pin 39; // segnale di strobe DSP
TSCNT0                   pin 18; // enable tri-state buffer MAC0 per lettura dato
TSCNT1                   pin 26; // enable tri-state buffer MAC1 per lettura dato
Equations
 

when ([P11..P0] < 2086) then CTNCCD = 1 else CTNCCD = 0;
CTNMAC = ([P11..P0] > 33) & ([P11..P0] < 2086);

ROG = ([P11..P0] < 2105) # ([P11..P0] >= 2149);
PREL = ((([P11..P0] > 2138) & ([P11..P0] <= 2146)) & XF0);
CCDCLOCK = CK1 & CTNCCD;
ADCLOCK = !CK1;

CLKXY = CK0 & CTNMAC;
CLKOUT = (CK0 & !CK1) & (CTNCCD # PREL);
INT = (([P11..P0] < 2105) # ([P11..P0] >= 2108)) # !XF0;

TSCNT0 = !(!AD0 & !STROBE & XF0);
TSCNT1 = !(AD0 & !STROBE & XF0);

End