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ARM920T Microprocessor Core The MC9328MXL uses the ARM920T microprocessor
core which has the following features:
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. 200 MHz maximum processing speed |
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. 16K instruction cache and 16K data cache |
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. ARM9 high performance 32-bit RISC engine |
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. Thumb® 16-bit compressed instruction set for a leading
level of code density |
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. EmbeddedICE. JTAG software debug |
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. 100-percent user code binary compatibility with ARM7TDMI®
processors |
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. ARM9TDMI® core, including integrated caches, write buffers,
and bus interface units, provides CPU-cache transparency |
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. Advanced Microcontroller Bus Architecture (AMBA.)
system-on-chip multi-master bus interface |
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. Flexible CPU and bus clocking relationships including
asynchronous, synchronous, and single-clock configurations |
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. Cache locking to support mixed loads of real-time and user
applications |
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. Virtual Memory Management Unit (VMMU) |
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AHB to IP Bus Interfaces (AIPIs) The MC9328MXL AIPIs provide a communication
interface between the high-speed AHB bus and a lower-speed IP bus for slow
slave peripherals.
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External Interface Module (EIM)
The MC9328MXL EIM features:
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. Up to six chip selects for external devices, each with 16
Mbyte of address space (chip selects for ROM support a maximum of 32 Mbyte
of address space) |
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. Programmable protection, port size, and wait states for
each chip select |
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. Internal/external boot ROM selection |
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. Selectable bus watchdog counter |
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. Burst support for external AMD. or Intel® flash with
32-bit data path |
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. Interrupt controller to handle a maximum of 63 interrupt
sources |
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. Vectored interrupt capability with prioritization for 16
sources |
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. Supports DTACK function in the CS5 |
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SDRAM Controller (SDRAMC) The MC9328MXL SDRAMC features:
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. Supports 4 banks of 64-, 128-, or 256-Mbit synchronous
DRAMs |
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. Includes 2 independent chip-selects |
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. Up to 64 Mbyte per chip-select |
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. Up to four banks simultaneously active per chip-select |
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. JEDEC standard pinout and operation |
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. Supports Micron SyncFlash® SDRAM-interface burst flash
memory |
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. Boot capability from CSD1 |
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. Supports burst reads of word (32-bit) data types |
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. PC100 compliant interface |
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. 100 MHz system clock achievable with .-8. option PC100
compliant memories |
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. single and fixed-length (8-word) word access
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. Typical access time of 8-1-1-1 at 100 MHz |
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. Software configurable bus width, row and column sizes, and
delays for differing system requirements |
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. Built in auto-refresh timer and state machine |
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. Hardware supported self-refresh entry and exit which keeps
data valid during system reset and low-power modes |
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. Auto-powerdown (clock suspend) timer |
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Clock Generation Module (CGM) and Power Control Module.
The MC9328MXL CGM and Power Control
Module features:
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. Digital phase-locked loops (PLLs) and clock controller for
all internal clocks generation |
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. MCUPLL generates FCLK to the CPU from either a 32 kHz or
32.768 kHz |
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. System PLL generates the system clock and the 48 MHz clock
for the USB from a 16 MHz or either a 32 kHz or 32.768 kHz |
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. Support for three power modes for different power
consumption needs: run, doze, and stop |
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Two Universal Asynchronous Receiver/Transmitters (UART 1
and UART 2)
The MC9328MXL UARTs
feature:
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. Support for serial data transmit/receive operation: 7 or 8
data bits, 1 or 2 stop bits, and programmable parity (even, odd, or none) |
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. Programmable baud rates up to 1.00 MHz |
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. 32-byte FIFO on Tx and 32 half-word FIFO on Rx that
support autobaud |
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. IrDA 1.0 support |
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Two Serial Peripheral Interfaces (SPI)
The MC9328MXL SPIs feature:
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. SPI 1 is master/slave configurable, SPI 2 is master only |
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. Up to 16-bit programmable data transfer |
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. 8 × 16 FIFO for both Tx and Rx data |
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Two General-Purpose 32-Bit Counters/Timers
The MC9328MXL General-Purpose Counters/Timers
feature:
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. Automatic interrupt generation |
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. Programmable timer input/output pins |
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. Input capture capability with programmable trigger edge |
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. Output compare with programmable mode |
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Watchdog Timer
The MC9328MXL Watchdog Timer
features:
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. Programmable time out of 0.5 s to 64 s |
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. Resolution of 0.5 s |
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Real-Time Clock/Sampling Timer (RTC)
The MC9328MXL RTC features:
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. 32.768 kHz or 32 kHz |
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. Full clock features: seconds, minutes, hours, and days |
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. Capable of counting up to 512 days |
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. Minute countdown timer with interrupt |
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. Programmable daily alarm with interrupt |
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. Sampling timer with interrupt |
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. Once-per-second, once-per-minute, once-per-hour, and
once-per-day interrupts |
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. Interrupt generation for digitizer sampling or keyboard
debouncing |
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LCD Controller (LCDC)
The MC9328MXL
LCDC features:
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. Software programmable screen size (a maximum of 640 × 512
pixels) to support single (non-split) monochrome, color STN panels, and
color TFT panels |
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. Support for 4 bpp (bits per pixel), 8 bpp, and 12 bpp for
passive color panels |
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. Support for 4 bpp, 8 bpp, 12 bpp, and 16 bpp for TFT
panels |
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. Up to 256 colors out of a palette of 4096 for 8 bpp |
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. True 64K color for 16 bpp |
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. In color STN mode, the maximum bit depth is 12 bpp |
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. In BW mode, the maximum bit depth is 4 bpp |
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. Up to 16 grey levels out of 16 palettes |
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. Capable of directly driving popular LCD drivers from
manufacturers including Motorola, Sharp, Hitachi, and Toshiba |
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. Support for data bus width for 12- or 16-bit TFT panels |
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. Panel interface of 8-, 4-, and 2-bits, and a 1-bit wide
LCD panel data bus for monochrome panels |
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. Direct interface to Sharp® 320 × 240 HR-TFT panel |
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. Support for logical operation between color hardware
cursor and background |
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. Uses system memory as display memory |
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. LCD contrast control using 8-bit PWM |
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. Support for self-refresh LCD modules |
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. Hardware panning (soft horizontal scrolling) |
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Pulse-Width Modulation (PWM) Module
The MC9328MXL PWM Module features:
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. 4× 16 FIFO to minimize interrupt overhead |
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. 16-bit resolution |
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. Sound and melody generation |
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Universal Serial Bus (USB) Device
The
MC9328MXL USB Device features:
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. Compliant with Universal Serial Bus Specification,
revision 1.1 |
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. Up to six logical endpoints.see Table 1 on page 7 |
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. Support for isochronous communications pipes |
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. Frame match interrupt feature notifies the user when a
specific USB frame occurs |
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. For DMA access, the maximum packet size for the
isochronous endpoint is restricted by the FIFO size of the endpoint |
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. For programmed I/O, isochronous data packets range from 0
bytes to 1023 bytes |
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. Support for control, bulk, and interrupt pipes |
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. Packet sizes are limited to 8, 16, 32, or 64 bytes |
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. Maximum packet size depends on the FIFO size of the
endpoint |
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. Support (via a register bit) for a remote wake-up feature |
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. Full-speed (12 MHz) operation |
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. Operation can be programmed for both bus-powered and
self-powered mode |
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Multimedia Card and Secure Digital (MMC/SD) Host
Controller The MC9328MXL MMC/SD Host
Controller features:
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. Compatible with the
MultiMediaCard System Specification
(SPI mode excluded), version 3.1 |
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. Compatible to 1/4 bit with the SD Memory Card Specification
(SPI mode excluded), version 1.0 and SD
I/O Specification (SPI mode
excluded), version 1.0 with 1 or 4 channel(s) |
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. Up to ten MMC cards and one SD are supported by standard (maximum
data rate with a maximum of ten cards) |
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. Support for hot swappable operation |
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. Support for data rates from 20 Mbps to 80 Mbps |
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Memory Stick® Host Controller (MSHC) The MC9328MXL MSHC features:
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. Integrated 8-byte (4-word) FIFO buffer for transmit and
receive |
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. Integrated CRC circuit |
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. Support for internal or external serial clock source |
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. Integrated Serial Clock Divider |
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. DMA support; DMA request condition is selectable based on
FIFO status |
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. Automatic command execution when an interrupt from the
Memory Stick is detected (can be toggled on/off) |
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. RDY time-out period set by the number of serial clock
cycles |
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. Interrupt output to the ARM920T core when a time-out
occurs |
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. Two integrated general-purpose input pins for detecting
Memory Stick insertion/extraction |
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. 16-bit host bus access (byte access not supported) |
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Direct Memory Access Controller (DMAC) The MC9328MXL DMAC features:
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. 11 channels to support linear memory, 2D memory, FIFO, and
End-of-Burst Enable FIFO for both source and destination |
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. Support for 8-, 16-, or 32-bit FIFO port size and memory
port size data transfer |
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. Support for big-endian and little-endian |
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. Configurable DMA burst length for each channel up to 16
words, 32 half-words, or 64 bytes |
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. Bus utilization control for a channel that is not
triggered by DMA requests |
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. Bulk data transfer complete or transfer error interrupts
provided to interrupt handler (and then to the core) |
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. DMA burst time-out error terminates the DMA cycle when the
burst cannot be completed within a programmed timing period |
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. Acknowledge signal provided to peripheral after DMA burst
is complete |
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Synchronous Serial Interface and Inter-IC Sound (SSI/I2S)
Module The MC9328MXL SSI/I2S
Module features:
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. Supports generic SSI interface for external audio chip or
interprocessor communication |
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. Supports Philips standard Inter-IC Sound (I2S)
bus for external digital audio chip interface |
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Inter-IC (I2C)
Bus Module The MC9328MXL I2C
Bus Module features:
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. Support for Philips I2C-bus
standard for external digital control |
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. Support for 3.3 V tolerant devices |
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. Multiple-master operation |
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. Software-programmable for 1 of 64 different serial clock
frequencies |
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. Software-selectable acknowledge bit |
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. Interrupt-driven, byte-by-byte data transfer |
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. Arbitration-lost interrupt with automatic mode switching
from master to slave |
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. Calling address identification interrupt |
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. Start and stop signal generation and detection |
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. Repeated START signal generation |
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. Acknowledge bit generation and detection |
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. Bus-busy detection |
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Video Port The MC9328MXL video
port supports external CMOS sensor video data input. |
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General-Purpose I/O (GPIO) Ports
The
MC9328MXL GPIO ports feature:
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. Interrupt capability |
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. 97 total I/O pins multiplexed with most dedicated
functions for pin efficiency |
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Bootstrap Mode The MC9328MXL Bootstrap Mode features:
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. Allows user to initialize system and download program or
data to system memory through UART |
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. Accepts execution command to run program stored in system
memory |
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. Supports memory/register read/write operation of
selectable data size of byte, half-word, or word |
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. Provides a 32-byte instruction buffer for ARM920T core
vector table storage, instruction storage and execution |
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Multimedia Accelerator (MMA) The MC9328MXL Multimedia Accelerator features:
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. MAC for FIR and FFT operation.MP3 applications save 10% to
15% CPU MIPS |
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. DCT/iDCT hardware accelerator.MPEG4 decode applications
save approximately 10% CPU MIPS |
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Power Management Features The MC9328MXL provides the following power
management features:
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. Programmable clock synthesizer using either a 32 kHz or
32.768 kHz crystal for full frequency control |
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. Low-power stop capabilities |
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. Modules that can be individually shut down |
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. Lowest power mode control |
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Operating Voltage Range The MC9328MXL operating voltages are as follows:
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. I/O voltage.1.70 V to 2.0 V or 2.7 V to 3.3 V |
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. Internal logic voltage.150 MHz: 1.70 V to 1.9 V; 200 MHz:
1.8 to 2.0V |
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Packaging The
MC9328MXL features two packages:
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. 256-pin MAPBGA package with 14 mm × 14 mm × 1.3 mm, 0.8 mm
ball pitch |
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. 225-pin PBGA package with 13 mm × 13 mm, 0.8 mm ball pitch |
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