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Feature - Interface And Bus Glossary
Interface and bus glossary.
Interface and bus glossary Published on 10/31/97 This Netpanel special feature will define and explain a wide variety of interfaces and buses used in personal computers
PS/2 Another type of port (or interface) that can be used to connect mice and keyboards to the computer
SCSI ( Small Computer System Interface ) A type of parallel interface that is commonly used for mass storage devices
IDE ( Integrated Drive Electronics ) This is a commonly used interface for hard disk drives and CD-ROM drives
ISA ( Industry Standard Architecture ) The original form of ISA was a simple and slow 8-bit bus used on IBM PCs
ISA slots are used to connect expansion boards to the motherboard
EISA is not widely used, due to its high cost and complicated nature
MCA ( Micro Channel Architecture ) This is a proprietary bus used in early IBM machines as a replacement for ISA
PCI ( Peripheral Component Interconnect ) This type of internal bus is the most commonly used in today's systems
Bolo
Specifications and pictures.
Architecture as of the latter part of the 90's OS support: kernel drivers (Unix, W32 bit) Maximum bandwidth: 100 Mb/s Minimum latency: 300 microseconds Acquired as: multiple-vendor hardware Interface port/bus used: ISA, PCI and VME bus Network structure: multiple hubs & routers Cost per node: $50 - $100 The Sun VME busses are connected via HSSI (High Speed Serial Interface )
Linux and UNIX support: kernel drivers Maximum bandwidth: 10 to 100 Mb/s Minimum latency: 1, 000 microseconds Available as: commodity hardware Interface port/bus used: RS232C & SCSI Network structure: cable between machines Cost per machine connected: $15.00 More good links: Presentation of this web page does NOT imply release of any information contained herein, to the public domain
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ISA Bus Technical Summary
The Industry Standard Architecture information.
PS/2 Technical Reference - AT Bus Systems - This document from IBM includes signal definitions and timing diagrams for the ISA bus used in some of IBM's PS/2 line of computers
() (ISBN 0-929392-15-9) ISA System Architecture , by Don Anderson and Tom Shanley () (ISBN 0-201-40996-8) SA19 to SA0 System Address bits 19:0 are used to address memory and I/O devices within the system
These signals may be used along with LA23 to LA17 to address up to 16 megabytes of memory
Only the lower 16 bits are used during I/O operations to address up to 64K I/O locations
LA23 to LA17 Unlatched Address bits 23:17 are used to address memory within the system
They are used along with SA19 to SA0 to address up to 16 megabytes of memory
AEN Address Enable is used to degate the system microprocessor and other devices from the bus during DMA transfers
BALE Buffered Address Latch Enable is used to latch the LA23 to LA17 signals or decodes of these signals
When used with AEN, it indicates a valid microprocessor or DMA address
It is used in some ISA board applications to allow synchronization with the system microprocessor
info: BUS USED
Photo by www.xbitlabs.com
TechFest - Micro Channel Bus Technical Summary
Micro Channel Bus technical summary.
It was the primary expansion bus used in IBM's Personal System/2 and RS/6000 computers over the period from about 1987 to 1995
The signals used for an address of up to 4GB are MADE 24, M/-IO, and A0 through A31 of the address bus
-PREEMPT: -Preempt: This signal is used by arbitrating participants to request use of the channel through arbitration
The address bus and the associated signals are used by the controlling master to assert the memory address or the I/O address ( M/-IO ), to enable a slave to latch the address and status signals ( -S0, -S1 ), and to indicate that the memory address is greater than 16MB
Note: A0 - A31 are used to transfer data during a 64-bit streaming data cycle
The data bus is used to transfer either 8, 16, 24, or 32 bits of data
-BE0 - -BE3: -Byte Enable 0 through 3: These signals are used during data transfers with 32-bit slaves to indicate which data bytes are valid on the data bus
-CMD: -Command: This signal is driven by the controlling master and is used to define when data on the data bus is valid
It is used with A0 to distinguish between high-byte transfers ( D8 - D15 ) and low-byte transfers ( D0 - D7 ) and double-byte (16-bit) transfers to 16-bit data ports
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ISA Bus Tutorial
Describes the hardware of the PC ISA bus.
We list the most used pins and its description below
AEN (pin B11): It is used for the DMA controller to take over the data and address buses in a DMA transfer
ALE (pin 28): This signal is used for the uP to lock the 16 lower address BUS in a latch during a memory (or port) input/output operation
OSC (pin 30): Is a high frequency clock which can be used for the I/O boards
Note that INTR and INTA are not present in the ISA bus, this signals are only used for the uP and the 8259A
In an 8086 system the first Kbyte of memory (from 00000H to 003FFH) is used for the interrupt vectors
Some of the 256 interrupt vectors are used for the system, others are free to be used for the user programs
The 8237 DMA controller is the device used for the PC to do this job
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Expanding the SCSI Bus
SCSI interface is projected by most industry analysts to maintain its hold on
the mass storage market through the year 2005. Reprinted article from Computer ...
In stand alone applications, where all of the devices are internal, this may not be a problem, but in applications where external device packages are to be used in a system, the short single ended cabling becomes a serious issue
ASYNC/ SLOW FAST ULTRA ULTRA2 Single Ended SCSI No Expanders 6 3 1.5 NA 1 Expander 12 6 3 NA 2 Expanders 18 9 4.5 NA 2 (point to point) 24 12 6 NA High Voltage Differential (HVD) SCSI No Expanders 25 25 25 NA 1 Expander 50 50 50 NA 2 Expanders 75 75 75 NA 2 (point to point) 100 100 100 NA Low Voltage Differential (LVD) SCSI No Expanders * * * 12 1 Expander * * * 24 2 Expanders * * * 36 2 (point to point) * * * 48 * = LVD can go longer distances at slower transmission rates Note: Cable segments of different types can be used in the same SCSI domain with converting expanders
Parallel SCSI Expanders used as extenders separate a SCSI bus (SCSI domain) into more than one physical segment, each of which can have the full SCSI cable length for that type
SCSI Domain consisting of a single segment: SCSI Domain with two segments using an expander: SCSI Domain with three segments using two expanders: SCSI Domain with middle segment used as a point to point extension of the bus: SCSI Domain with expanders creating branches: = Terminator NOTE: SCSI Domains contain a maximun of the total number of addressable SCSI devices as specified in the SCSI standards (normally 8 or 16 devices)
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PCI Express Bus Description
A very concise description of PCI Express Bus and its architecture.
The nominal resistor values used is 100 ohms, but would depend on the cable or PWB trace impedance used
LVDS is a scalable bus; one uni-directional link or multiple links may be used
One common PCIe implementation seems to have two 1x PCI Express slots [for expansion boards] and one 16x PCIe slot [used to replace the slot], then some number of standard parallel (classic) PCI slots [3 to 4 connectors]
Two types of PCIe connectors are common on PCs; the 1x connector which is used for a normal board expansion slot and the 16x connector which is used as a video card expansion slot
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Article covering history of the bus market and an explanation of how the
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The PCI (Peripheral Component Interconnect) Bus has been widely used as a general purpose I/O interconnect standard over the last ten years, but is really beginning to hit the limits of its capabilities
3rd Generation IO, or 3GIO, has been recently renamed PCI Express, and looks to be the replacement for the ubiquitous PCI bus, the most successful peripheral interconnect bus used in PCs
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